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 PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
PD4992
8-Bit Parallel I/O Calendar Clock
The PD4992 is a CMOS integrated circuit which outputs 8-bit parallel time and calendar data in a system in which a microprocessor is employed. The PD4992 operates at 32.768 kHz and provides year, month, day of month, day of week, hour, minute, and second data to a system. The PD4992 internally contains a voltage regulator so that low power consumption operation and high accuracy are realized even if the supply voltage varies. The PD4992 uses the 8-bit bus to facilitate interfacing with a microprocessor.
FEATURES:
* Internal counter for time (hour, minute, second), and calendar (leap year, year, month, day of month, day of week) * Super low power consumption (IDD = 2 A MAX. at VDD = 2.4 V) * Automatic determination of leap year, manual setting possible * 12 hour/24 hour mode selectable * 8-bit parallel input/output in BCD data format * 12 kinds of interval timer output (can be used as watchdog timer) * Internal voltage detection circuit for automatic determination of battery run-down * High accuracy
ORDERING INFORMATION:
Order Code Package 20-pin plastic DIP (300 mil) 20-pin plastic SOP (300 mil) 20-pin plastic SOP (300 mil) Provided on adhesive tape 20-pin plastic SOP (300 mil) Provided on embossed carrier tape
PD4992CX PD4992GS PD4992GS-T1, T2 PD4992GS-E2
The information in this document is subject to change without notice. Document No. ID-3084 (1st edition) (O.D. No. ID-8222) Date Published March 1997 P Printed in Japan
(c)
1995 1992
PD4992
PIN CONFIGURATION
TP
1
20
VDD
CS1
2
19
XIN
WR
3
18
XOUT
A0
4
17
CS2
A1
5
16
D7
A2
6
15
D6
RD
7
14
D5
D0
8
13
D4
D1
9
12
D3
VSS
10
11
D2
BLOCK DIAGRAM
OSC 15 Stage Binary Divider Time Counter
Day of the week
Second
Minute
Time
XOUT
Clock Stop
Day
CS1 CS2 TP Generator
TP
RD
WR
8 D0 to D7
Data Bus Controller
Mode Registor Control Registor
3 A0 to A2
Address Bus Controller
Address Decoder
2
Year
XIN
1 / 215
Month
PD4992
ABSOLUTE MAXIMUM RATINGS (VSS = 0 V)
Item Supply voltage Input voltage range Output pin withstand voltage Low level output current (N ch Open Drain) Operating temperature range Storage temperature range Symbol VDD VIN VOUT IOUT Topt Tstg Ratings -0.3 to 7.0 -0.3 to VDD + 0.3 7.0 30 -40 to +85 -65 to +125 Unit V V V mA C C
ELECTRICAL CHARACTERISTICS (VSS = 0 V, f = 32.768 kHz, CG = CD = 20 pF, Ci = 20k ohms, Ta = -40 to +85 C)
Item Operating voltage range High level input voltage Low level input voltage Supply current Supply current Input leakage current High level output voltage Low level output voltage Low level output voltage High level leakage current Symbol VDD VIH VIL IDD IDD ILI VOH VOL1 VOL2 ILOH VDD = 5.5 V, VIN = VSS VDD = 2.4 V, VIN = VSS VDD = 5.5 V, VIN = VDD or VSS IOH = -1.0 mA IOL = 2.0 mA IOL = 1.0 mA (N ch Open Drain) TPout = VDD (N ch Open Drain) 4 x 10-5 2.4 Condition MIN. 2.4 0.7 VDD VSS 2 0.6 1 x 10-5 4.3 0.1 0.4 0.4 1.0 TYP.* MAX. 5.5 VDD 0.3 VDD 6 2 1.0 Unit V V V
A A A
V V V
A
*: Ta = +25 C
SWITCHING CHARACTERISTICS
WRITE CYCLE (unless otherwise specified VDD = 5 V 10 %, Ta = -40 to +85 C)
Item Cycle time CS-WR reset time Address - WR reset time Address - WR set up time Write pulse width Address hold time Input data set up time Input data hold time WR - output floating time Symbol tWC tCW tAW tAS tWP tWR tDW tDH tWHZ Condition MIN. 150 120 120 0 90 20 50 0 50 ns TYP. MAX. Unit
3
PD4992
WRITE CYCLE TIMING WAVEFORMS 1
tWC ADDRESS
RD
tAW tCW
CS tAS tWP tWR
WR tOHZ DOUT
tDW
tDH
DIN
WRITE CYCLE TIMING WAVEFORMS 2 (RD = VIL)
tWC ADDRESS tAW tCW CS tAS tWP tWR
WR tWHZ DOUT tDW DIN tDH tOW
4
PD4992
READ CYCLE (unless otherwise specified VDD = 5 V 10 %, Ta = -40 to +85 C)
Item Cycle time Address access time CS - access time RD - output delay time RD - output delay time RD - output delay time Output hold time CS - output set time CS - output floating time Symbol tRC tAA tACS tOE tOLZ tOHZ tOH tCLZ tCHZ 15 10 5 5 50 Condition MIN. 150 150 150 75 ns TYP. MAX. Unit
READ CYCLE TIMING WAVEFORMS 1
CS tRC
ADDRESS tAA tOH
RD tOE DOUT tOLZ Data output
READ CYCLE TIMING WAVEFORMS 2
ADDRESS tRC
CS tCHZ tACS
RD tCLZ DOUT tOHZ Data output
5
PD4992
PIN FUNCTION
Pin symbol CS1 CS2 WR Pin name Chip select input Chip select input Write signal input Pin number 2 17 3 Function Internal register can be accessed when CS1 = L and CS2 = H Writes the contents of data bus to the register selected by address input at the rising edge Outputs the contents of the register selected by address input to the data bus at the rising edge Data input/output bus Address input to select internal register Interval signal and timing pulse output (N ch open drain output) Crystal resonator and capacitor are connected to these pins. 2.4 V to 5.5 V Connect to GND
RD
Read signal input
7
D0 to D7 A0 to A2 TP
Data input/output Address input Timing pulse output
8, 9, 11 to 16 4 to 6 1
XIN XOUT VDD VSS
Crystal resonator connection pin Crystal resonator connection pin Power supply pin GND
19 18 20 10
External components (crystal resonator, capacitors) must be located as close as the IC, and separated as far as from high speed clock wiring.
VDD C1 XIN X XOUT C2
5 V or 0 V
X: 32.768 kHz C1, C2: 10 to 30 pF
6
PD4992
REGISTER - ADDRESS CORRESPONDENCE TABLE
ADDRESS HEX 0H 1H 2H 3H 4H 5H 6H 7H BIN 000B 001B 010B 011B 100B 101B 110B 111B 12/24H b7 b6 b5 Register contents b4 b3 b2 b1 b0
10s second digit 10s minute digit AM/PM 10s hour digit Leap year counter
1s second digit 1s minute digit 1s hour digit Day of week digit 1s day of month digit 1s month digit 1s year digit Control register
Leap year control
10s day digit 10s month digit 10s year digit Mode register
AM/PM flag (R/W) : In 12 hour mode, 0 indicates AM, and 1 indicates PM. Always 0 in 24 hour mode. 12/24H flag (R/W) : 0 indicates 24 hour mode, and 1 indicates 12 hour mode. LEAP YEAR CONTROL REGISTER (R/W)
b7 0 0 1 1 b6 0 1 0 1 Leap year effective Leap year effective Leap year invalid Leap year invalid Mode Writing to leap year counter disabled Writing to leap year counter enabled Writing to leap year counter disabled Writing to leap year counter enabled
* When the leap year control register is "0X" and the leap year counter is "00" Leap year (Feb. has 29 days). * To disable leap year mode, write "10" to the leap year control register (Feb. 28 is followed by Mar. 1).
7
PD4992
MODE REGISTER (R/W)
HEX 0H 1H 2H 3H 4H 5H 6H 7H 8H 9H AH BH CH DH EH FH BIN 0000B 0001B 0010B 0011B 0100B 0101B 0110B 0111B 1000B 1001B 1010B 1011B 1100B 1101B 1110B 1111B Mode Outputs TP2048 Hz Outputs TP1024 Hz Outputs TP256 Hz Outputs TP64 Hz Outputs INT1/2048s Outputs INT1/1024s Outputs INT1/256s Outputs INT1/64s Outputs INT1s Outputs INT10s Outputs INT60s Outputs BUSY signal Test mode 1 Test mode 2 Test mode 3 Test mode 4
CONTROL REGISTER
Access mode b3 b2 CLK adjust 0 When writing 1 b1 Reset b0 CLK stop
0: NOP 0: NOP 0: CLK start ------------------------------------------ 1: CLK adjust 1: Reset 1: CLK stop TP enable*1 INT reset INT stop
0: TP = ENABLE 0: NOP 0: INT start ------------------------------------------ 1: TP = DISABLE 1: Reset 1: INT stop TP flag OSC flag*2 BUSY flag*3
* When reading (Don't care)
0: TP = Z 0: No oscillation 0: OFF ------------------------------------------ 1: TP = L 1: Oscillation 1: ON
*1 : When TP enable is 1 (TP = DISABLE), the TP pin becomes high impedance (actually a high level because a pull up resistor is connected to the TP pin). But TP flag is not DISABLE in this case. *2 : If the OSC flag becomes 0 by oscillation stop, the OSC flag remains to be 0 when oscillation is resumed. To set OSC flag to 1 again, execute CLK reset (if the OSC flag still remains to be 0, oscillation has not been started again). Upon initial power application of the PD4992, 0 is set to the OSC flag. *3 : The BUSY flag is "1" when the time counter of the PD4992 is operating (when read is disabled).
8
PD4992
Table 1 Time Counter Data
TIME COUNTER 1s second digit 10s seocnd digit 1s minute digit 10s minute digit 1s hour digit 10s hour digit Day of week digit DATA 0-9 0-5 0-9 0-5 0-9 0-5 0-6 TIME COUNTER 1s day of month digit 10s day of month digit 1s month digit 10s month digit 1s year digit 10s year digit DATA 0-9 0-3 0-9 0-1 0-9 0-9
Table 2 Hour Counter Data
Hour AM 1 o'clock AM 2 o'clock AM 3 o'clock AM 4 o'clock AM 5 o'clock AM 6 o'clock AM 7 o'clock AM 8 o'clock AM 9 o'clock AM 10 o'clock AM 11 o'clock PM 12 o'clock 24 hour mode 01H 02H 03H 04H 05H 06H 07H 08H 09H 10H 11H 12H 12 hour mode 81H 82H 83H 84H 85H 86H 87H 88H 89H 90H 91H D2H Hour PM 1 o'clock PM 2 o'clock PM 3 o'clock PM 4 o'clock PM 5 o'clock PM 6 o'clock PM 7 o'clock PM 8 o'clock PM 9 o'clock PM 10 o'clock PM 11 o'clock AM 12 o'clock 24 hour mode 13H 14H 15H 16H 17H 18H 19H 20H 21H 22H 23H 00H 12 hour mode C1H C2H C3H C4H C5H C6H C7H C8H C9H D0H D1H 92H
9
PD4992
TYPICAL INT CONTROL EXAMPLES (mode register: INT output mode) (1) Use of INT reset (example 1)
T
T
INT reset
30.5 s
(2) Use of INT reset (example 2)
T T
INT output
INT reset
INT reset
(3) Use of INT stop (example 1)
t1 t2 T = t1 + t2
INT output
INT stop
Clear INT stop
(4) Use of INT stop (example 2)
30.5 s T
INT output
INT stop
Clear INT stop
10
PD4992
(5) Use of INT reset, INT stop
t1
T
INT output
INT stop
INT reset
Clear INT stop
(6) Use of TP enable
T T
INT output
TP DISABLE
TP ENABLE
11
PD4992
TP OUTPUT (mode register: TP output mode)
1/f
50 % duty continuous output
BUSY SIGNAL
1s carry over Internal counter 1 Hz 1s carry over
Busy signal output TP output DISABLE set 457.7 s 30.5 s
BUSY flag ON
BUSY flag OFF
BUSY flag ON
The time and calendar data read out when BUSY signal is being output may not be correct. This is because, the internal time counter is operating. Therefore, accessing must be disabled during this period or the data must be read out twice and checked by the software. (Reading data during BUSY period has not effect on the contents of the internal counter.)
12
PD4992
OUTLINE DRAWING
20PIN PLASTIC DIP (300 mil)
20 11
1
A I
10
K P L
J
H G
F B D N
M
C M R
NOTES 1) Each lead centerline is located within 0.25 mm (0.01 inch) of its true position (T.P.) at maximum material condition. 2) ltem "K" to center of leads when formed parallel.
ITEM MILLIMETERS A B C D F G H I J K L M N P R 25.40 MAX. 1.27 MAX. 2.54 (T.P.) 0.500.10 1.1 MIN. 3.50.3 0.51 MIN. 4.31 MAX. 5.08 MAX. 7.62 (T.P.) 6.4 0.25 +0.10 -0.05 0.25 0.9 MIN. 0~15
INCHES 1.000 MAX. 0.050 MAX. 0.100 (T.P.) 0.020 +0.004 -0.005 0.043 MIN. 0.1380.012 0.020 MIN. 0.170 MAX. 0.200 MAX. 0.300 (T.P.) 0.252 0.010 +0.004 -0.003 0.01 0.035 MIN. 0~15
P20C-100-300A,C-1
13
PD4992
20 PIN PLASTIC SOP (300 mil)
20 11 detail of lead end
1 A
10 H
G
P
I
J
F
K
E
C D
NOTE
N M
M
B
L
ITEM MILLIMETERS A B C D E F G H I J K L M N P 13.00 MAX. 0.78 MAX. 1.27 (T.P.) 0.40 +0.10 -0.05 0.10.1 1.8 MAX. 1.55 7.70.3 5.6 1.1 0.20 +0.10 -0.05 0.60.2 0.12 0.10 3 +7 -3
INCHES 0.512 MAX. 0.031 MAX. 0.050 (T.P.) 0.016 +0.004 -0.003 0.0040.004 0.071 MAX. 0.061 0.3030.012 0.220 0.043 0.008 +0.004 -0.002 0.024 +0.008 -0.009 0.005 0.004 3 +7 -3
Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition.
P20GM-50-300B, C-4
14
PD4992
RECOMMENDED SOLDERING CONDITIONS
The following conditions (see table below) must be met when soldering this product. Please consult with our sales offices in case other soldering process is used, or in case soldering is done under different conditions. TYPES OF SURFACE MOUNT DEVICE
PD4992GS
Soldering process Soldering condition Peak package's surface temperature: 235 C or below, Reflow time: 30 seconds or below (210 C or higher), Number of reflow process: 2, Exposure limit*: None Peak package's surface temperature: 215 C or below, Reflow time: 40 seconds or below (200 C or higher), Number of reflow process: 2, Exposure limit*: None Solder temperature: 260 C or below, Flow time: 10 seconds or below, Number of flow process: 1, Exposure limit*: None Terminal temperature: 300 C or below, Flow time: 10 seconds or below, Exposure limit*: None Symbol
Infrared ray reflow
IR35-00-2
VPS
VP15-00-2
Wave soldering
WS60-00-1
Partial heating method
*: Note:
Exposure limit before soldering after dry-pack package is opened. Storage conditions: 25 C and relative humidity at 65 % or less. Do not apply more than a single process at once, except for "Partial heating method".
TYPE OF THROUGH HOLE MOUNT DEVICE
PD4992CX
Soldering process Wave soldering Soldering conditions Solder temperature: 260 C or below, Flow time: 10 seconds or below.
15
PD4992
[MEMO]
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product.
M4 96.5
16


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